L822 battery

　　Research and analysis of epitaxial thin film silicon L822 battery?

　　The first technique is to make epitaxial thin-film L822 battery, starting from highly doped crystalline silicon wafers (such as premium metallurgical silicon or scrap), and then using chemical vapor deposition (CVD) methods to deposit epitaxial layers. In addition to advantages such as cost and availability, this approach could enable the gradual transition of silicon L822 battery from wafer-based to thin-film technology. Because it has a process similar to the traditional bulk silicon process, this technology is easier to implement on existing process lines than other thin film technologies.

　　The second is thin-film solar cell technology based on layer transfer, which epitaxially deposits a single-crystal silicon layer on a porous silicon film, so that the single-crystal silicon layer can be separated from the substrate at a certain point in the process. The idea behind this technology is to reuse the mother substrate multiple times, resulting in a very low cost for the final silicon wafer per solar cell. An interesting option under investigation is the possibility of isolating the porous silicon film prior to epitaxy and exploring the possibility of a support-free film process.

　　The last type is thin-film polysilicon L822 battery, in which a layer of crystalline silicon with a thickness of only a few microns is deposited on a cheap heterogeneous substrate, such as ceramics (Figure 2) or high-temperature glass. Polycrystalline silicon films with grain sizes between 1-100mm are a good choice. We have demonstrated that high-quality polycrystalline silicon L822 battery can be obtained using aluminum-induced crystallization of amorphous silicon. This process can produce a very thin polysilicon layer with an average grain size of about 5 mm. Then, using high-temperature CVD technology with a growth rate exceeding 1 mm/min, the seed layer is epitaxially grown into an absorption layer several microns thick, and the substrate is ceramic alumina or glass ceramic. Thermal CVD was chosen because of its high growth rate and the ability to obtain high-quality crystals. However, this choice limits the use of heat-resistant substrate materials such as ceramics. This technology is not as mature as other thin film technologies, but it has shown great potential to reduce costs.

　　Adopting thin-film PV technology has been able to improve the efficiency of L822 battery or simplify their processes and will reduce their costs. But no one has been able to combine these two aspects at the same time. However, some recent findings have taken a necessary step in the right direction.

　　Improvements in epitaxial cells

　　The efficiency of epitaxial thin-film silicon L822 battery is not very high (cells produced by semi-industrial screen printing technology are about 12%), which limits the photovoltaic industry's attention to this cell type. It can achieve an open circuit voltage and fill factor comparable to bulk silicon L822 battery (monocrystalline silicon L822 battery are ±77.8%). However, the short-circuit current (Jsc) is limited by thin optical active layers (<20mm). Light penetrating the epitaxial layer is collected and lost by the highly doped, low-quality substrate. Therefore, it is not uncommon to see a 7mA/cm2 short-circuit current difference between these two solar cell technologies. The typical value of Jsc for bulk silicon L822 battery is about 33mA/cm2, while the average value for epitaxial thin film cells is about 26mA/cm2.

　　However, two independent battery-level developments have improved the situation2. By increasing the optical path length within the thin active layer, we reported a screen-printed epitaxial cell with a Jsc of 30 mA/cm2 and an efficiency of 13.8%.

　　The first improvement that contributed to these results was surface light scattering using fluorine-based plasma roughening (Figure 3). Ideally, this roughened surface of the active layer would diffuse the light 100% (i.e., a Lambertian refractor). This allows photons to pass through the active layer at an average angle of 60°, doubling the optical path length. In other words, the optical performance of a 20mm thin layer is equivalent to that of a 40mm thick active layer. We found that this total light scattering can be obtained by removing just 1.75mm of silicon. The advantages of plasma roughening are many, including lower reflection (down from 35% before roughening to 10%), oblique incidence light coupling, and lower contact resistance (because of the smaller contact area between the silicon substrate and the silver electrode). larger). We observe an absolute increase in Jsc of 1.0-1.5, while an efficiency increase of 0.5-1.0%.

　　The second improvement is internal light trapping through the introduction of porous silicon Bragg reflectors. To reduce the transmission of long wavelength light into the substrate, an intermediate reflector is placed at the interface between the substrate and the epitaxial layer. In this way, photons reaching this interface are reflected and pass through the active layer a second time. Since light begins to diffuse the moment it enters the cell (this is determined by the Lambertian characteristics of plasma roughening), a large proportion of photons will hit the front surface at an angle greater than the escape angle. Therefore, most of the photons are reflected inward again and pass through the active layer a third time. This situation is repeated continuously, making it possible for photons to pass through the epitaxial layer multiple times.

　　In practice, such reflectors are produced by electrochemically growing stacks of porous silicon with alternating high and low porosity (multiple Bragg reflectors).

　　During the growth of the active layer, the porous silicon stack automatically transforms into alternating layers containing holes of different sizes (Figure 4). This structure has proven to be an ideal reflector based on structural interference. For a 15-layer porous silicon stack, calculations show that the optical path length increases by a factor of 14. In other words, the optical performance of a 15mm thin layer is equivalent to that of a 210mm thick silicon layer.

　　In order to verify the effectiveness of these two improved methods, epitaxial cells with a surface area of 18cm2 were fabricated on three different carrier substrates. On a single-crystal silicon substrate as a proof-of-concept, the cell efficiency increased to 13.8% and the fill factor reached 77.8%, indicating that there are no conductivity issues using heavily structured porous silicon stacks. The experimental results obtained on a low-quality silicon substrate were slightly lower, with an efficiency of 13.5% and a fill factor of 77.7%. In the case of porous silicon, the fact that the epitaxial layers grown on polycrystalline substrates are of poorer quality may explain the performance degradation. The process is currently being optimized and higher efficiency gains are expected in the near future.

　　Improvements in polycrystalline silicon films

　　For another type of solar cell, polycrystalline thin-film L822 battery based on aluminum-induced crystallization, we recently achieved a record efficiency of 7%. The battery is fabricated on a high-temperature substrate, using a seed layer based on aluminum-induced crystallized amorphous silicon, and epitaxially thickening the seed layer into an absorber layer at 1130°C. It should be noted that the silicon does not need to be re-melted in this process. The silicon is remelted on a ceramic substrate.

　　Another way to obtain polycrystalline silicon L822 battery. However, this method requires extremely high temperatures (over 1400°C), which requires the substrate to have very good thermal stability, and the risk of contamination is also high. Key to these achievements were specially designed and implemented cell contacts combined with plasma-roughened surfaces.

　　Most high-temperature substrates suitable for polycrystalline silicon L822 battery are insulators, so new metal contact schemes must be developed to avoid the use of back contacts. Considering the low cost of manufacturing modules, the most convenient method is to integrate the battery's interconnection process into the battery manufacturing process. We use a single-module process that combines cell interconnection with cell contacts. All contacts are made in an interdigitated pattern on top of the cell. Different process sequences can be used to obtain this novel contact structure. Currently used is a simple two-step laboratory process that combines photolithography with metal evaporation. In mass production, metallization can be achieved through a single-step process, such as screen printing or evaporation using a mask.

　　This specially designed contact structure was applied to cells with an active layer area of 1 cm2 and compared with cells with peripheral base contacts. The open-circuit voltage (Voc) of the two contact types is roughly equivalent, but the cell with interdigitated contacts performs much better in terms of short-circuit current (Jsc) and fill factor. Depending on the grain size and layer thickness, cell efficiency can reach 5.6%3.

　　In order to further increase the current density and thus the efficiency of the battery, we use plasma roughening to realize a new battery concept. Until now, in the substrate construction of polycrystalline silicon L822 battery, the substrate has been used as a back reflector. By roughening the front surface of the cell, you can reduce the front reflectivity of the cell and better couple light into the cell, allowing for more efficient photon capture. Plasma roughening is accomplished in a reactor using fluorine-based chemicals. The results showed an increase in current density of about 15% (this result was obtained on an alumina substrate). The increased current density pushes the battery's efficiency to a record 7%.

　　However, although the obtained Voc (506mV) and fill factor (71%) can be said to have reached the best current process level, the current density (19.7mA/cm2) and cell efficiency are still too low for commercialization. By optimizing the plasma roughening process and reducing the thickness of the field layer on the backside of the cell, we hope to achieve efficiencies well above 7.0% in the near future.

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