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A complete collection of high-frequency inverter rear-stage circuit diagrams (four high-frequency inverter rear-stage circuit diagrams)
C1 and C2 in the middle are the GD junction capacitances of Q1 and Q2 respectively. The upper and lower waveforms on the left are the gate drive waveforms of Q1 and Q2 respectively. Let's start with the analysis from the t1-t2 dead zone moment. From the figure, we can see that this period is the dead zone time, which means that both tubes are not conducting during this period, and the midpoint voltage of the half-bridge is half of the bus voltage. , that is to say, the charging of C1 and C2 is also half of the bus voltage. When the drive signal reaches time t2, the gate of Q1 becomes high level, Q1 begins to conduct, the potential at the midpoint of the half-bridge rises sharply, C2 is charged through the bus voltage, and the charging current passes through the drive resistor Rg and the drive circuit discharge tube Q4, this charging current will generate a glitch voltage on the driving resistor Rg and the driving circuit discharge tube Q4. Please see the red vertical line at time t2 in the picture. If the amplitude of this glitch voltage exceeds the turn-on voltage Qth of Q2, the upper and lower transistors of the half-bridge are common. Sometimes the upper and lower tubes are slightly connected, which does not necessarily cause the tube to explode, but it will cause the power tube to heat up, and you will also see obvious interference burrs when observed with an oscilloscope on the busbar. Only when the commonality is serious will the pipes be blown. Another characteristic is that the higher the bus voltage, the higher the burr voltage, and the more likely it is to cause pipe explosion.
High frequency inverter rear stage circuit diagram 2:
The logic ground of pin 13 and the driving ground of pin 2 should be separated during wiring. The logic ground should generally be connected to the negative terminal of the 5V filter capacitor, and then to the negative terminal of the high-voltage filter capacitor. The driving ground should generally be connected to 12-15V. The negative terminal of the filter capacitor of the driving power supply, and then the source of the farther MOS among the two low-end high-voltage MOS tubes. As shown below:
In a sine wave inverter, because the frequency of the carrier wave is high and the bus voltage is also high, high-frequency and high-voltage diodes must be used as bootstrap diodes. Because the carrier duty cycle is close to 100%, the capacity of the bootstrap capacitor must be calculated according to the fundamental wave. Generally, it needs to be 47-100uF. It is best to combine it with a small high-frequency capacitor.
High frequency inverter rear stage circuit diagram 3:
In the circuit in Figure 1, the inverter circuit that converts 12V DC into 220V/50kHz AC consists of chip IC1 and its peripheral circuits, transistors VT1, VT3, MOS power tubes VT2, VT4, and transformer T1. It is composed of chip IC2 and its peripheral circuits, transistors VT5, VT8, MOS power tubes VT6, VT7, VT9, VT10, and 220V/50kHz rectifier and filter circuits VD5-VD8, C12, etc. 220V/50kHz high-frequency AC power is converted into 220V/50Hz The power frequency AC conversion circuit finally outputs 220V/50Hz AC power through the XAC socket for use by various portable appliances.
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