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Reducing the power consumption of cellular handsets and extending their battery life is the goal of every handset design engineer. Design engineers are adding features such as MP3 players, cameras, and full-motion video to modern mobile phones, which continually require minimizing power consumption.
Reducing the power supply voltage of the mobile phone's main chips (such as analog baseband chips and digital baseband chips) - perhaps 2.8V or even 1.8V - is one way to reduce power consumption. But problems arise when design engineers need to retain one or more support chips with high supply voltages. The most common is that the smartphone's extra features will require higher voltages. One example is chordal ringtones. Since the peak-to-peak range of audio signals is approximately 3.2V, the circuits that generate and transmit these ringtones usually require a 4.2V supply voltage. This creates a problem at the interface between the baseband and ringer circuits.
To illustrate this, we're going to use an analog switch to switch voice or ringtone to the speaker as an example. In order for these two types of circuits to coexist on the same printed circuit board (PCB), one must either compromise on power consumption or use low-voltage digital logic in the baseband chip to drive the analog switches. It should be noted, however, that adopting the latter approach may lose the power savings gained from lowering the supply voltage of the baseband chip because the analog switches operate in non-ideal modes and thus sink large currents.
A simple way to solve this problem is to perform level conversion on the digital logic from the baseband chip to maintain the baseband chip using 1.8V voltage to save power consumption, but this solution requires a higher voltage driver and must work at a higher voltage. Remove any chip in your phone.
To further explain why this scheme requires a level converter, let's look at where the current actually flows. As shown in Figure 1, the digital input of the analog switch is a basic CMOS buffer, which consists of pMOS and NMOS transistors connected to the inverter.
Apply the signal to the I/p input pin of the buffer. When the input voltage is higher than the input high voltage (Vih), the output voltage of the buffer is Vdd (power supply voltage). When the input voltage is lower than the input low voltage (Vil), the output voltage of the buffer is GND (ground). This ensures that the gate voltage of the analog switch is the voltage at one end of the power supply, thereby maximizing its signal range. Scanning the input voltage from 0 to Vdd while monitoring the power supply current (Idd) produces the I-V characteristic curve shown in Figure 2. When the input voltage is either terminal voltage of the supply voltage, Idd drops to the minimum value (0μA). But when the input voltage is close to the trip point of the buffer, Idd increases sharply. Therefore, the analog switch consumes the lowest power when the digital input voltage applied to the I/p terminal is the voltage at one end of the power supply.
The characteristic curve of the buffer is shown in Figure 2. Because the NMOS and pMOS switch tubes used in buffer design are actually used as voltage-controlled resistors. The characteristics of these chips are as follows: Vgs>Vt—>Transistor turns on VgsTransistor turns off. Vt is defined as the threshold voltage. When it is higher than this voltage, a conductive channel is formed between the source and drain. The Vt of the NMOS transistor is 0.9V, and the Vt of the pMOS transistor is -0.9V. Therefore, when the input voltage is 0V, the pMOS (M1) is in the on state, and the output of the first stage is Vdd. In the second stage, the NMOS (M5) device is in the on state and the total buffer output is 0V. When the register input voltage increases (before reaching the maximum current), it will cause the impedance of M1 to increase (M1 starts to turn off) and the impedance of M5 to decrease (M5 starts to turn on). At this time, we will see the formation between Vdd and GND. low impedance channel. Further increasing the input voltage causes only one transistor of the buffer's input-output transistor pair to conduct.
We continue to analyze the analog switch example using the above principles, and consider using ADI's ADG884 analog switch to switch between the chord ringer and voice of the mobile phone. The control signal from the digital baseband chip is 1.8V. As shown in Figure 2, if a 1.8V digital signal is used to directly drive the analog switch, the supply current should be 120μA. If the analog switch's digital input voltage is higher than 3.8V, the power consumption should actually be 0. Therefore, in order to make the analog switch operate in the lowest power consumption area, the digital signal of the digital baseband chip needs to be converted to a higher voltage. The ADG3301, which comes in Analog Devices' SC70 ultra-small package and typically consumes only 0.1µA, is ideal for this job as a level translator. As shown in Figure 3, it can be connected to the power supply voltage of the baseband chip and the power supply voltage of the analog switch and convert the logic levels between the two chips.
Of course, the analog switch in the above example could be any chip that operates at higher voltages. Contemporary mobile phones are composed of multiple CMOS integrated circuits (ICs) to perform different functions, such as audio as well as video and digital cameras. These ICs typically operate at any voltage between 5V and 1.8V, sometimes even lower supply voltages.
In short, we use level conversion to save power consumption to extend battery life. The following factors should be considered: Low-end mobile phones usually use batteries with a capacity of 600mAh. The battery standby time of low-end mobile phones is 300 hours (hr), and its nominal current is 2mA. The analog switch used in this example would draw 4.8% of the current without level shifting, but only draw 0.04% of the current with the level shifting described above.
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